Presentation is loading. Please wait.

Presentation is loading. Please wait.

Chapter 9: Memory Management

Similar presentations


Presentation on theme: "Chapter 9: Memory Management"— Presentation transcript:

1 Chapter 9: Memory Management
内存是计算机系统的最重要的资源之一。 为提高响应速度及CPU的利用率,必须将多个进程同时放入内存,多进程共享内存。 本章介绍内存管理方法。内存管理方法很多,但内容主要涉及下述三个方面: 内存分配回收方法 地址映射和重定位 内存保护 /22/2017

2 内存管理 本章讨论内存管理的各种方案,内存管理算法在不同的系统中有不同的方案,每种方案有自己的优点与缺点,选择某种方案取决于多种因素,尤其依赖于系统的硬件设计因素。 /22/2017

3 本章内容 Background(背景) Logical versus Physical Address Space(逻辑与物理地址空间)
Swapping (交换) Contiguous Allocation(连续分配) Paging(分页) Segmentation(分段) Segmentation with Paging(段页式) /22/2017

4 Background Program must be brought into memory and placed within a process for it to be executed.(程序必需装入内存,并为其创建内存才能被执行) Input queue – collection of processes on the disk that are waiting to be brought into memory for execution.(输入队列— 磁盘上等待进入内存并执行的进程的集合) User programs go through several steps before being executed. (用户程序在执行之前必需经历很多步骤装入、地址映射、重定位) /22/2017

5 Binding of Instructions and Data to Memory
Address binding of instructions and data to memory addresses can happen at three different stages. (内存地址联编可以在三个不同的阶段发生。) 教材中用捆绑。 /22/2017

6 指令与地址联编 Compile time(编译时期): If memory location known a priori, absolute code can be generated; must recompile code if starting location changes.(如果内存位置已知,可生成绝对代码;如果开始位置改变,需要重新编译代码) Load time(装入时期): Must generate relocatable code if memory location is not known at compile time.(如果存储位置在编译时不知道,则必须生成可重定位代码) Execution time(执行时期): Binding delayed until run time if the process can be moved during its execution from one memory segment to another. Need hardware support for address maps (e.g., base and limit registers). (如果进程在执行时可以在内存中移动,则地址绑定要延迟到运行时。需要硬件对地址映射的支持,例如基址和限长寄存器) /22/2017

7 9.01 /22/2017

8 9.03 /22/2017

9 Dynamic Loading动太装入 Routine is not loaded until it is called.(程序在调用之前并不执行) Better memory-space utilization; unused routine is never loaded.(更好的内存空间利用率;没有被使用的程序不被载入。) Useful when large amounts of code are needed to handle infrequently occurring cases.(当需要大量的代码来处理不经常发生的事情时是非常有用的。) No special support from the operating system is required implemented through program design.(不需要操作系统的特别支持,通过程序设计实现) /22/2017

10 Dynamic Linking Linking postponed until execution time.(链接被推迟到执行时期)
Small piece of code, stub, used to locate the appropriate memory-resident library routine.(小的代码片 - 存根,用来定位合适的保留在内存中的库程序。) Stub replaces itself with the address of the routine, and executes the routine.(存根用子程地址来替换自己,以及执行例子程序程。) Operating system needed to check if routine is in processes’ memory address.(操作系统需要检查例程是否在进程的内存空间) /22/2017

11 Overlays覆盖 Keep in memory only those instructions and data that are needed at any given time.(只是在内存中保留那些在特定时间所需要的指令和数据) Needed when process is larger than amount of memory allocated to it.(当进程比所分配的内存大时,覆盖是必需的) Implemented by user, no special support needed from operating system, programming design of overlay structure is complex.(由用户执行,不需要操作系统的特别支持,覆盖结构的程序设计很复杂。) /22/2017

12 9.02 /22/2017

13 Logical vs. Physical Address Space
The concept of a logical address space that is bound to a separate physical address space is central to proper memory management.  (逻辑地址空间的概念同物理地址空间想关联,它是正确内存管理的中心。) Logical address – generated by the CPU; also referred to as virtual address.(逻辑地址—由CPU产生;也叫做虚拟空间。) Physical address – address seen by the memory unit.(物理地址—内存设备所读入的地址) /22/2017

14 Logical and physical addresses
Logical and physical addresses are the same in compile-time and load-time address-binding schemes; logical (virtual) and physical addresses differ in execution-time address-binding scheme. (逻辑和物理地址在编译时期和装入时期的地址联编(绑定)策略是相同的,而在执行时间的地址联编(绑定)策略是不同的。) /22/2017

15 Memory-Management Unit (MMU)
Hardware device that maps virtual to physical address.(硬件把虚拟地址映射到物理地址) In MMU scheme, the value in the relocation register is added to every address generated by a user process at the time it is sent to memory.(在MMU策略中,基址寄存器中的值在其送入内存的时候被加入到由一个用户进程所产生的每个地址中。) The user program deals with logical addresses; it never sees the real physical addresses.(用户程序所对应到的是逻辑地址,物理地址对它从来都不可见。) /22/2017

16 Swapping A process can be swapped temporarily out of memory to a backing store, and then brought back into memory for continued execution.(一个进程可以暂时被交换到内存外的一个备份区,随后可以被换回内存继续执行。) Backing store – fast disk large enough to accommodate copies of all memory images for all users; must provide direct access to these memory images.(备份区—是一个固定的足够大的可以容纳所有用户内存映像的拷贝;对于可以让这些内存映像直接存取。) /22/2017

17 Swapping交换 Roll out, roll in – swapping variant used for priority-based scheduling algorithms; lower-priority process is swapped out so higher-priority process can be loaded and executed.(换进,换出—交换由于基于优先级的算法而不同,低优先级的进程被换出,这样高优先级的进程可以被装入和执行。) Major part of swap time is transfer time; total transfer time is directly proportional to the amount of memory swapped.(交换时间的主要部分是转移时间,总的转移时间直接同交换的内存的数量成比例。) Modified versions of swapping are found on many systems, i.e., UNIX and Microsoft Windows.(在许多系统如:UNIX,Windows中,可以找到一些被修正过的交换措施。) /22/2017

18 Schematic View of Swapping
/22/2017

19 Contiguous Allocation
Main memory usually divided into two partitions:(主存通常被分为两部分) Resident operating system, usually held in low memory with interrupt vector.(为操作系统保留的部分,通常用中断矢量保存在内存低端。) User processes then held in high memory.(用户进程保存在内存高端。) /22/2017

20 9.05 /22/2017

21 Single-partition allocation(单独分区分配)
Relocation register contains value of smallest physical address; limit register contains range of logical addresses – each logical address must be less than the limit register. (基址寄存器包含最小物理地址的值;限长寄存器包含逻辑地址的范围,每个逻辑地址必需比限长寄存器的值小。) /22/2017

22 单一连续内存分配 Relocation-register scheme used to protect user processes from each other, and from changing operating-system code and data.(基址寄存器策略由来保护用户进程(同其他进程和改变的操作系统代码和数据分开。) /22/2017

23 Multiple-partition allocation(多分区分配)
Hole – block of available memory; holes of various size are scattered throughout memory.(分区—可用的内存块,不同大小的分区分布在整个内存中。) When a process arrives, it is allocated memory from a hole large enough to accommodate it.(当一个进程到来的时候,它将从一个足够容纳它分区中分配内存。) Operating system maintains information about(操作系统包含以下信息): a) allocated partitions (已分配的分区) b) free partitions (hole)(空闲的分区) /22/2017

24 Contiguous Allocation (Cont.)
OS OS OS OS process 5 process 5 process 5 process 5 process 9 process 9 process 8 process 10 process 2 process 2 process 2 process 2 /22/2017

25 9.07 /22/2017

26 9.08 /22/2017

27 Dynamic Storage-Allocation Problem
How to satisfy a request of size n from a list of free holes. (怎样从一个空的分区序列中满足一个申请需要。) /22/2017

28 可变分区分配算法 First-fit(最先适应): Allocate the first hole that is big enough.(分配最先找到的合适的分区。) Best-fit(最佳适应): Allocate the smallest hole that is big enough; must search entire list, unless ordered by size. Produces the smallest leftover hole. (搜索整个序列,找到适合条件的最小的分区进行分配。) Worst-fit(最差适应): Allocate the largest hole; must also search entier list. Produces the largest leftover hole.(搜索整个序列,寻找最大的分区进行分配。) /22/2017

29 性能分析 First-fit and best-fit better than worst-fit in terms of speed and storage utilization.(在速度和存储的利用上,首先适应和最佳适应要比最差适应好。) /22/2017

30 9.06 /22/2017

31 Fragmentation碎片问题 External fragmentation(外碎片) – total memory space exists to satisfy a request, but it is not contiguous.(整个内存空间用来满足一个请求,但它不是连续的。) Internal fragmentation(内碎片) – allocated memory may be slightly larger than requested memory; this size difference is memory internal to a partition, but not being used.(分配的内存可能比申请的内存大一点,这两者之间的差别是内部不被使用的簇) /22/2017

32 碎片问题 Reduce external fragmentation by compaction(通过压缩来减少内碎片)
Shuffle memory contents to place all free memory together in one large block.(把一些小的空闲内存结合成一个大的块。) Compaction is possible only if relocation is dynamic, and is done at execution time.(只有重置是动态的时候,才有可能进行压缩,压缩在执行时期进行) I/O problem(I/O问题) Latch job in memory while it is involved in I/O.(当I/O的时候,把工作锁定在内存中。) Do I/O only into OS buffers.(只对操作系统的缓冲区进行I/O。) /22/2017

33 9.09 /22/2017

34 9.10 /22/2017

35 9.11 /22/2017

36 Paging分页管理 Logical address space of a process can be noncontiguous; process is allocated physical memory whenever the latter is available.(进程的逻辑地址空间可能是不连续的,如果有可用的物理内存,它将分给进程。) Divide physical memory into fixed-sized blocks called frames (size is power of 2, between 512 bytes and 8192 bytes).(把物理内存分成大小固定的块。) Divide logical memory into blocks of same size called pages.(把逻辑内存也分位固定大小的块,叫做页。) Keep track of all free frames.(保留一个页的记录。) To run a program of size n pages, need to find n free frames and load program.(运行一个有N页大小的程序,需要找到N个空的页框读入程序。) Set up a page table to translate logical to physical addresses. (建立一个页表,把逻辑地址转换为物理地址。) Internal fragmentation.(内碎片。) /22/2017

37 Address Translation Scheme地址转换
Address generated by CPU is divided into(CPU产生的地址被分为): Page number (p) (页号)– used as an index into a page table which contains base address of each page in physical memory.(它包含每个页在物理内存中的基址,用来作为页表的索引。) Page offset (d) (页内位移)– combined with base address to define the physical memory address that is sent to the memory unit.(同基址相结合,用来确定送入内存设备的物理内存地址。) /22/2017

38 Address Translation Architecture
/22/2017

39 Paging Example /22/2017

40 Implementation of Page Table
Page table is kept in main memory.(主存中的页表) Page-table base register (PTBR) points to the page table.(页表基址寄存器指向页表) Page-table length register (PRLR) indicates size of the page table.(页表限长寄存器表明页表的长度) In this scheme every data/instruction access requires two memory accesses. One for the page table and one for the data/instruction.(在这个机制中,每一次的数据/指令存取需要两次内存存取,一次是存取页表,一次是存取数据) The two memory access problem can be solved by the use of a special fast-lookup hardware cache called associative registers or translation look-aside buffers (TLBs). (通过一个联想寄存器,可以解决两次存取的问题) /22/2017

41 9.14 /22/2017

42 Associative Register Page # Frame # /22/2017

43 用联想寄存器并行查找 Associative registers – parallel search (联想寄存器—并行查找)
Address translation (A´, A´´)  (地址转换) If A´ is in associative register, get frame # out. (如果A’在联想寄存器中,把页框#取出来。) Otherwise get frame # from page table in memory.  (否则从内存中的页表中取出页框#。) /22/2017

44 Effective Access Time Associative Lookup =  time unit(联想寄存器的查找需要时间)
Assume memory cycle time is 1 microsecond(假设内存一次存取要1微秒) Hit ration – percentage of times that a page number is found in the associative registers; ration related to number of associative registers.(命中率—在联想寄存器中找到页号的比率,比率与联想寄存器的大小有关。) Hit ratio =  Effective Access Time (EAT)(有效存取时间) EAT = (1 + )  + (2 + )(1 – ) = 2 +  –  /22/2017

45 Memory Protection Memory protection implemented by associating protection bit with each frame.(内存的保护由与每个页框相连的保护位来执行。) Valid-invalid bit attached to each entry in the page table(有效-无效位附在页表的每个表项中): “valid” indicates that the associated page is in the process’ logical address space, and is thus a legal page.(“有效”表明相关的页在进程的逻辑地址空间,以及是一个合法的页。) “invalid” indicates that the page is not in the process’ logical address space.(“无效”表明页不在进程的逻辑地址空间中。) /22/2017

46 9.15 /22/2017

47 9.16 /22/2017

48 9.17 /22/2017

49 Two-Level Page-Table Scheme
/22/2017

50 9.20 /22/2017

51 Two-Level Paging Example
A logical address (on 32-bit machine with 4K page size) is divided into(一个逻辑地址被分为): a page number consisting of 20 bits.(一个20位的页号。) a page offset consisting of 12 bits.(一个12位的偏移。) Since the page table is paged, the page number is further divided into(页表页被分为): a 10-bit page number. (一个10位的页号。) a 10-bit page offset.(一个10位的偏移。) /22/2017

52 Two-Level Paging Example
Thus, a logical address is as follows(因此,一个逻辑地址表示如下): where pi is an index into the outer page table, and p2 is the displacement within the page of the outer page table. page number page offset pi p2 d 10 10 12 /22/2017

53 Address-Translation Scheme
Address-translation scheme for a two-level 32-bit paging architecture(一个两级32位分页结构的地址转换机制) /22/2017

54 Multilevel Paging and Performance
Since each level is stored as a separate table in memory, covering a logical address to a physical one may take four memory accesses.(由于每一级都分开的以表的形式存储在内存中,把一个逻辑地址转换为一个物理地址可能要进行4次内存存取。) Even though time needed for one memory access is quintupled, caching permits performance to remain reasonable.(尽管每次内存存取的时间是很大的,高速缓存使执行的时间还是可以接受的。) Cache hit rate of 98 percent yields(缓存的命中率使98%)则: effective access time = 0.98 x x 520 = 128 nanoseconds. which is only a 28 percent slowdown in memory access time.(这只把内存存取时间降低了28%。) /22/2017

55 Inverted Page Table One entry for each real page of memory.(一个内存中页的表项。) Entry consists of the virtual address of the page stored in that real memory location, with information about the process that owns that page.(表项包含真正内存地址的页的虚拟地址,它包括拥有这个页的进程的信息。) Decreases memory needed to store each page table, but increases time needed to search the table when a page reference occurs.(减少内存需要储存每个页表,但是当访问一个页时,寻找页表需要增加时间。) Use hash table to limit the search to one — or at most a few — page-table entries.(使用哈希表来减少搜索。) /22/2017

56 Inverted Page Table Architecture
/22/2017

57 Shared Pages Shared code(共享代码)
One copy of read-only (reentrant) code shared among processes (i.e., text editors, compilers, window systems).(一个只读(可再入)代码可由进程共享。) Shared code must appear in same location in the logical address space of all processes.(共享代码出现在所有进程的逻辑地址空间的相同位置。) Private code and data (私有代码和数据) Each process keeps a separate copy of the code and data.(每个进程保留一个代码和数据的私有拷贝。) The pages for the private code and data can appear anywhere in the logical address space.(私有代码和数据的页可以出现在逻辑地址空间的任何地方。) /22/2017

58 Shared Pages Example /22/2017

59 Segmentation Memory-management scheme that supports user view of memory. (内存管理机制支持用户观点的内存。) A program is a collection of segments. A segment is a logical unit such as(一个程序是一些段的集合,一个段是一个逻辑单位,如:): main program, procedure, function, local variables, global variables, common block, stack, symbol table, arrays /22/2017

60 Logical View of Segmentation
1 4 2 3 1 2 3 4 user space physical memory space /22/2017

61 Segmentation Architecture
Logical address consists of a two tuple(一个逻辑地址是两个向量的集合): <segment-number, offset>, Segment table– maps two-dimensional physical addresses; each table entry has(段表 - 映射二维物理地址,每个表项包括): base– contains the starting physical address where the segments reside in memory.(基址 - 包括内存中段物理地址的起始地址。) limit – specifies the length of the segment.(限长 - 指定段的长度。) /22/2017

62 分段管理 Segment-table base register (STBR) points to the segment table’s location in memory.(段表基址寄存器指向段表在内存中的地址。) Segment-table length register (STLR) indicates number of segments used by a program;(段表限长寄存器表明被一个程序所使用的段的数目。) segment number s is legal if s < STLR. /22/2017

63 Segmentation Architecture (Cont.)
Relocation.(重定位) dynamic(动态) by segment table (由段表来执行) Sharing.(共享) shared segments(共享的段) same segment number (同样的段号) Allocation.(分配) first fit/best fit(首先/最佳适配) external fragmentation(外碎片) /22/2017

64 Segmentation Architecture (Cont.)
Protection. With each entry in segment table associate(保护,每个段表的表项有): validation bit(有效位) = 0  illegal segment read/write/execute privileges(读/写/执行权利) Protection bits associated with segments; code sharing occurs at segment level.(保护位同段相联系,在段的级别进行代码共享。) Since segments vary in length, memory allocation is a dynamic storage-allocation problem.(由于段的各个长度不同,内存分配是一个动态存储-分配问题。) A segmentation example is shown in the following diagram(下面的是一个段的例子) /22/2017

65 /22/2017

66 9.22 /22/2017

67 9.23 /22/2017

68 9.24 /22/2017

69 9.25 /22/2017

70 Segmentation with Paging – MULTICS
The MULTICS system solved problems of external fragmentation and lengthy search times by paging the segments.(MULTICS系统通过结合分页解决外碎片问题和搜索时间长的问题。) Solution differs from pure segmentation in that the segment-table entry contains not the base address of the segment, but rather the base address of a page table for this segment.(由于段表表项包含的不是“部分”的基址,而是这个“部分”一个页表的基址,解决的办法与纯段不同。) /22/2017

71 MULTICS Address Translation Scheme
/22/2017

72 Segmentation with Paging – Intel 386
As shown in the following diagram, the Intel 386 uses segmentation with paging for memory management with a two-level paging scheme.(如下图所示,Intel 386使用段页结合来进行二级分页的内存管理。) /22/2017

73 /22/2017

74 Comparing Memory-Management Strategies
Hardware support(硬件支持) Performance(执行) Fragmentation(碎片) Relocation(重定位) Swapping (交换) Sharing (共享) Protection(保护) /22/2017

75 9.26 /22/2017

76 9.27 /22/2017

77 9.28 /22/2017


Download ppt "Chapter 9: Memory Management"

Similar presentations


Ads by Google