核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China GEM 读出电子学 一点个人理解 2015 年 6 月 23 日 中国科学技术大学 近代物理系 安 琪 核探测与核电子学国家重点实验室
State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China 报告内容 基本的读出方法 系统平台框架 ASIC 芯片近期发展
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China 基本的读出方法 系统平台框架 ASIC 芯片近期发展
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China Pre_Amp + Shaper + 数字化 延迟线 + Disc. + TDC 波形数字化 编码读出 基本的读出方法
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China 传统技术路线 : Pre_Amp + Shaper + 数字化 PreAmp Fast/Slow Shaper Comparator Peak Detect & Hold Digital FIFO/Buffer Analog FIFO/Buffer ADC/TDC PreAmp Slow Shaper Comparator Peak Detect & Hold Fast Shaper Analog FIFO/Buffer Digital FIFO/Buffer TDC ADC ASIC 技术路线的发展 PreAmp Slow Shaper Fast Shaper N:1 NUX TDC PreAmp Fast/Slow Shaper Comparators/FIFO Switched Capacitor Arrays N:1 MUX Output Buffer ADC/TDC SCAs N:1 NUX ADC Comparators /FIFO CSA 为主
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China Pre_Amp + Shaper + 数字化 ASIC 技术路线的发展 PreAmp Slow Shaper Fast Shaper N:1 NUX TDC PreAmp Fast/Slow Shaper Comparators/FIFO Switched Capacitor Arrays N:1 MUX Output Buffer ADC/TDC SCs Arrays N:1 NUX ADC Comparators /FIFO` SoC
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China 典型 ASIC 芯片 : HELIX128-2 128Ch. +1 (Test) 129 CSA 130 Shaper 128 Comparators 128 Pipeline SCA Cell for each Ch. 4 x 34 MUX. 2 Current Buffer Rupertus Carola Univ. Germany Ulrich Trunk ,博士论文, 2000 Silicon Strip Detector , Microstrip Gaseous Chambers Originally developed for the HERA-B experiment 2-D readout of a triple GEM detector ( LHCb )
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China 典型 ASIC 芯片 : APV25 128Ch. 0.25 m CMOS Low Noise CSA 50ns CR-RC Shaper 192 Pipeline(SCA) Pulse Shape Processor Peak mode Deconvolution mode 128:1 MUX S/H Diff. Current Driver Rutherford Appleton Lab, Instrumentation Dept, Oxfordshire, UK NIMA 466 (2001) 359–365 Developed for silicon microstrip detectors in the CMS tracker
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China 读出方法:延迟线读出 大大减少了读出电子学通道数 空间分辨高( 100 m ) 死时间大 延迟线:分离元件或集成芯片 Delay Line Amp CFD TDC
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China 读出方法:延迟线读出
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China 读出方法:波形数字化 高速采样直接获取 GEM 输出脉冲的波形 优点: 很方便同时获取时间与能量信息; 消除了传统电荷积分放大带来的 “ 堆积 ” 效应,死时间小,适应于高亮度、高事例 率的物理实验; 此外,波形数字化还可以使物理学家采用 任何可能的数字处理方法来处理波形数字 化的信号数据。 缺点: 代价高:功耗、集成度、数据传输、成本, ……. Amp ADC GEM Detectors Data Processing
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China 读出方法:编码读出 优点:减少读出电子学通道数 两种实现方法: 感应编码读出 胡荣江等,原子核物理评论, V28, No.4 (2011) p459 直接编码读出 S. Procureur et al, Nucl. Instr. and Meth. A729 (2013) 888
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China 感应编码读出原理 增加感应读出条 电荷按比例分除到下面的相邻感应条上 对感应信号进行特定地编码合并,缩减 信号路数 放大成形后,直接用 ADC 记录 幅度大小关系位置 A>B1 B>C2 C>A3 A>C4 C>B5 B>A6 阳极条 感应条 通过鉴别两路信号的大小关系,用 3 路读出 电子学能确定 P n 2 = 6 路位置,其位置解码 如右表所示; 一般地,利用 n 路读出电子学,就可以唯一 地确定 P n 2 路位置。 任何相邻两个通道的排列方式最多出现一次 ,不能重复。 一维感应编码原理图 一维感应编码解码表 13
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China 直接编码读出原理 通常情况下,一个事例信号会被至少两个 相邻条读取到;因此采用如右的组合方式编 码, 放大成形后,直接用 ADC 记录,根据读出 各通道信号,则可以唯一地确定信号击中的 相邻条位置。 若 A,E 通道有信号,则可以确定击中位置在 5 , 6 条 阳极读出条 如图, 5 路读出可编码 11 个读出条的位置; n 通道读出电子学,对应有 C n 2 种无序组合 ,则可编码确定 C n 2 +1 个读出条的位置。 电荷重心法依然有效,可得到较小的分辨率 同理,此方法可扩展到二维。 一维直接编码原理图 14 一维直接编码读出解码表 A1A1 B2B2 C3C3 D4D4 E5E5 A6A6 C7C7 E8E8 B9B9 D 10 A 11
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China 基本的读出方法 系统平台框架 ASIC 芯片近期发展
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China 模块化、标准化的框架平台 NIM ; VME ; cPCI/PXI ; PCIe ; ATCA ;
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China SRS : Scalable Readout System SRS 理念 构建一个面向不同规模、不同类型、不同技术的 MPGD 探测器的通用多 通道读出电子学的平台框架。 CERN RD51 Collaboration 2008 年成立; 全球大约 80 多个研究所、大学参加; 成立了一个专门的读出电子学工作组 :WG5 ,目标是建立 “Portable Multichannel Readout system for Multi Pattern Gas Detectors ; 2009 年提出了 SRS 平台框架的理念和计划。
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China SRS 单元( Cell )的基本概念 三个基本组成部分 Front-End ( FE ) Front-End Hybrids: Front-End ASICs with all supporting Circuits ,紧靠探测器 Chip Link (HDMI, Optical) Front-End Card ( FEC ) Adapter Board FPGA-based Card: Programmable logic , Memory , H-Speed Communication. Scalable Readout Unit ( SRU ) Standard 6U DTCC: Data, Trigger, Clock & Control
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China SRS 单元的进一步说明 Chip Carriers Single Master Slave On-detector front-end hybrids APV25 VFAT BEETLE … Front-end adapter (FE-specific) ADC card digital FE card (VFAT) GBT receiver … Front-end FPGA card (SRS standard) modular firmware: SRS control application specific GbE to DAQ (small/ medium size system) to SRU (large-size system) Chip-links HDMI - analog (APV/Beetle) - digital (VFAT/Beetle) optical (GBT. …) … DTCC Max 40 FEC/ SRU Max 16 chip carriers/FEC
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China SRS 星型结构 Star Topology SRS employs a star topology with point-to-point connections between all components of the system, which enables the user to increase the number of DAQ cells when moving to a larger area detector.
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China SRS_ATCA ATCA: Advanced Telecommunications Computing A rchitecture
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China 一个最简单的 SRS 例子: Timepix
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China A Muon Tomography Station Using GEM Detectors APV2 5 Chips
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China 基本的读出方法 系统平台框架 ASIC 芯片近期发展
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China VMM GEMROC N-XYTER VFAT ASIC 芯片近期发展 ASIC 举例
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China VMM : An ASIC for ATLAS Muon Spectrometer Upgrade New Small Wheels sTGC Small Strip Thin Gap Chamber MM MicroMegas (MICROMEsh GAseous Structure) Front-end Electronics (ASIC) more than 2.3 million channels total operate in both polarities of charge sensing element capacitance pF charge meas. up to 2 < 1 fC rms time meas. ~ 100 < 1 ns rms trigger primitives, neighbor meas. low power (< 10mW/ch.), programmable 可以用于各类 Micro-Pattern Gaseous Detectors ,包括: GEM 。
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China VMM Family ASICs VMM1 (2012) 50 mm² 500k MOSFETs (8k/ch.) mixed-signal 2-phase readout 64-ch. : Charge & Time Measurement VMM2 (2014) 115 mm² > 5M MOSFETs (>80k/ch.) Deep re-design of VMM1 Higher functionality and complexity Continuous fully-digital readout VMM3 ( ) 130 mm² > 6M MOSFETs includes L1 handling and SEU-tolerant logic L1H
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China VMM1
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China VMM1 特征
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China VMM2 Architecture technology: IBM CMOS 130nm ; size: 13.5 mm x 8.4 mm power dissipation: 7-10 mV/ch. ; transistor count/ch.: > 80,000
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China VMM2 特征 : Analog Front-End
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China VMM2 特征 : Signal Processing o amplitude discriminator capable of processing sub ‐ hysteresis signals ; o discrimination threshold adjustable with 10bit global DAC, ~1mV steps, & 4bit channel DAC, ~1mV steps ; o option of disabling discrimination once the first peak is detected ; o force ‐ neighbor signal processing for above threshold events: when an event exceeds the threshold, the neighbor channels (in neighbor chips if desired) are forced to peak/time detection; enabled with global register bit sng; first and last channels communicate with associated channels in neighbor chips through bi ‐ directional pins sett, setb o peak detector with peak ‐ found signal for accurate timing (multi ‐ phase: track, peakdetect, hold&buffer) o 10bit peak amplitude conversion available for each channel , providing offset adjust. in LSB units. o time detector at peak ‐ found with time ‐ to ‐ amplitude conversion implementing voltage ramp with adjustable duration: 0.125, 0.25, 0.5, 1 μs, ramp starts at peak ‐ found from peak detector and stops either at falling edge of ena input or at next BC clock ; o 8bit timing conversion available for each channel and providing offset adjustment in LSB units. o address in real time (ART) available at output art either at threshold crossing or at peak found with flag indicator followed by serialized address ; o time ‐ over ‐ threshold, threshold ‐ to ‐ peak, peak ‐ to ‐ threshold, pulse ‐ at ‐ peak available for each channel at dedicated outputs ttp ; o 6bit peak amplitude conversion available for each channel at dedicated outputs ttp
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China Current Status VMM2 dies received from foundry in May 2014 Packaged samples received on Sept. 18 th (considerable delay in packaging process) and are being assembled on AZ PCB Dies wire-bonded on Sept. 15 th made possible preliminary tests
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China ATLAS Phase 1 Muon 谱仪端盖 NSW 触发系统研究 山东大学物理学院负责探测器 核探测与核电子学国家重点实验室( USTC )负责电子学 2015 年国家自然科学基金重大国际合作项目 前端读出电子学采用 VMM
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China 抗辐照 ASD/TDS IBM 130nm > 15 kHz/cm 2 Pad L0 trigger 预触发 高速数据传输 > 5 Gbps/fiber sTGC 触发系统前端电子学 ASD : VMM2 TDS : Michigan USTC
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China 系统 FEB 系统 通道 通道 + 采样率 40M Hz Bx + 采样率 40M Hz Bx + Pad Trigger L0 触发 + Pad Trigger L0 触发 + 4.8G bps Strip 触发信息 + 4.8G bps Strip 触发信息 + 尺寸 25 × 5 cm + 尺寸 25 × 5 cm 高度集成 : 512 channels 512 channels 8 VMM + 4 TDS 8 VMM + 4 TDS 1 SCA + 2 ELink 1 SCA + 2 ELink 512 通道 /25 cm VMM VMM VMM VMM VMM VMMVMM VMM TDS TDS TDS TDS sTGC 触发系统前端电子学: FEB
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China GEMROC: GEM Readout Chip 32Ch. Transimpedance Preamp, Fast/Slow Shaper Comparator & TWC ( Time-Walk Compensation ) Peak Detect & Hold Time Stamp Generator 两类 FIFOs :电荷 / 时间信息缓存 差分输出形式( analog , digital ) 0.35 m CMOS 2-D GEM ( 30cm x 30cm )读出, 事例率: 10 6 /s 2011 IEEE Nuclear Science Symposium Conference , AGH Univ. of Sci. & Tech. , Krakow Time-Walk Compensation
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China TWC: Time-Walk Compensation diffa , diffb :比较器输入 comp_outa , comp_outb :比较器输出 TWC_out , TWC 输出 V th Time Walk diffa 输入信号幅度小,充电电流 I CA 就大, 加快 C A 充电, TWC_out 前沿变快; 反之亦然; IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 30, NO. 12, DECEMBER 1995 , A CMOS Multichannel IC for Pulse Timing Measurements with 1 -mV Sensitivity
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China N-XYTER: Neutron-X-Y-Time-Energy Read-out Chip 0.35 m CMOS Originally developed for the high rate imaging neutron detection, NIMA 568(2006) 301–308 “2-dimensional GEM detector with FEE based on the nXYTER ASIC”, Jinst 9 C08026, 2014 “Self triggered readout of GEM in CBM” ( CBM-MUCH ), 14 th RD51 Collaboration Meeting, 2014 128Ch. CSA Preamp, Fast/Slow Shaper (达峰时间: 30ns/175ns ) Comparato & TWC ( Time-Walk Compensation ) Peak Detector & Holder Signal rate 900K/ch ENC:
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China N-XYTER TWC
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China nXYTER 的发展 128Ch. CSA Fast/Slow Shaper Comparator/TWC Peak Detector & Holder SCA Array for Charge Inf. Time Stamp Generator FIFO for Time Inf. MUX for Output Token Manager 增加部分 原有部分
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China STS-XYTER : nXYTER 的进一步发展 CBM 的 STS 组以 N-XYTER 为基础进行设计 、、 片内集成 Flash ADC 第一版 STS-XYTER 已完成测试 第二版正在设计,并改为: MUCH-XYTER
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China VFAT2 “Trigger & tracking” Front-End ASIC 128Ch. 0.25 m CMOS Designed for TOTEM of LHC Integrate A & D together Originally developing for three detectors of TOTEM: Silicon strips, Gas Electron Multipliers (GEM), Cathode Strip Chambers (CSC). Two main functions: Trigger Providing programmable “fast OR” information based on the region of the sensor hit & it’s used for the creation of a trigger. Tracking Providing precise spatial hit information for a given triggered event.
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China VFAT2 Transimpedance pre_Amp & Shaper. Calibration Unit Signal Discrimination with a Programmable threshold (programmable dc level ) Synchronization and monostable Fast OR Hit Signal 128 ch. are grouped in sectors & assigned to 8 LVDS outputs SRAM1: circular memory, 128 256 (6.4 s) Trigger Latencies: clock periods SRAM2: Used for Triggered Event Data only receiving the L1 (LV1A ) signal
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China VFAT3 Developed for the CMS triple-GEM system. The features of the new ASIC are listed below: Operation at high particle rate using large GEM detectors; Provide trigger data at 40MHz as well as precise tracking data upon Level-1 Accept signal; Large detector capacitance 20–60 pF; Relatively long signal charge collection 80 ns; Programmable shaping time: 25, 50, 100, 250, 500 ns; Interface required: slvds elinks to GBT at 320 Mbps; Level-1 trigger latency up to 20 ms; Integrated calibration, bias and monitoring functions. Using CFD to correct time walk
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China Thanks !
核探测与核电子学国家重点实验室 State Key Lab of Nuclear Detection & Electronics 中国科学技术大学 University of Sci.& Tech. of China 国内的进展