如何将软件移植到 英特尔® 凌动TM 处理器平台上

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如何将软件移植到 英特尔® 凌动TM 处理器平台上 演讲者: 张宇 英特尔嵌入互联解决方案实验室 高级经理 合作者: Lori Matassa 英特尔嵌入通信事业部 平台软件架构师 September 28, 2011

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英特尔及深度嵌入市场 如何将软件移植到英特尔®架构 软件开发工具 功耗及性能优化 英特尔® 凌动™ 处理器 E6xx 系列 视频及图像处理 议程 英特尔及深度嵌入市场 如何将软件移植到英特尔®架构 软件开发工具 功耗及性能优化 英特尔® 凌动™ 处理器 E6xx 系列 视频及图像处理

英特尔为深度嵌入市场提供的英特尔® 凌动™ 处理器

Break Away with Intel® Atom™ Processors: Chapter 2 快速发展的嵌入市场的今天与明天 PC/Server-like Deeply Embedded Low Power Lower Cost Greater Integration Break Away with Intel® Atom™ Processors: Chapter 2

为何在嵌入应用中选择英特尔®凌动™ 处理器?

Break Away with Intel® Atom™ Processors: Chapter 1 英特尔® 嵌入设计中心 Intel provides the Intel® Embedded Design Center (Web site) for developers. It contains information for hardware and software designs across Intel’s embedded products, including a step-by-step design guide that helps developers choose the right platform, a board planner, roadmap info, online training such as books, documents and videos, as well as migration guides, tools, and software downloads. The EDC provides a migration portal that guides migrating from other processor architectures to Intel architecture including SPARC* and PowerPC*, ARM*, and MIPS*. We will talk about architecture migration in this training, which includes and overview of the Intel® Atom E6xx series architecture and areas of software that need to be considered for all architecture migrations. Live demo Break Away with Intel® Atom™ Processors: Chapter 1 7

移植到英特尔® 架构

Break Away with Intel® Atom™ Processors: Chapter 4 移植设计指南 处理器/桥片 JTAG 固件 操作系统/设备驱动 应用/库 软件工具 步骤一 将代码移植到目标操作系统 在一个英特尔® 架构核上正确执行 在一个英特尔架构核上对代码性能进行优化 步骤二 将代码移植到多核并行系统中 在多核系统中对软件进行优化 Architecture migration and designing for the Intel® architecture is enabled by several solutions for the hardware and software. It starts with the processor and chipset and applies to all levels up through the software stack. This presentation will discuss each of these areas in detail. There are two main software parts to every architecture migration. The first part involves getting the code ported and executing correctly on one processor core of the target platform. Part one includes consideration of multiple software design areas including several hardware architectural differences, operating system, system initialization, and tools for migration and development. Part two involves adopting the target platform technologies. For example, part two for Intel® Atom™ platform targets could include moving from a uniprocessor serial code design to a multi-core code design. Understanding that every migration situation is different, the migration design guide, is covered in detail in the Intel Press book “Break Away with Intel® Atom™ Processors: A Guide to Architecture Migration.” The key point is that every migration and effort required is different. Depending on the software in the stack the software will be easily portable or require more effort. For stacks that use commercial software solutions, such as OS’s, drivers, libraries, and boot loaders, the migration should require minimal effort. ------------------------------------- SW tools often drive the sw project requirements. Project might require a certain compiler that follows certain ANSI standards, or a certain vendor’s tools. The OS needs to support those tools. Intel provides a complete tool suite for Intel® architecture-based platforms, and there are numerous TPV tools to choose from. Applications should be designed with portability in mind, meaning that they use the OS or middleware to abstract the software from the underlying hardware, but in some cases there will be applications that were written for a specific platform, in which case these applications will most likely require changes to execute correctly and most efficiently on IA. All platforms require some type of firmware to get the platform to a state where the OS loader can run. Other architectures normally provide their boot loaders for free, but for designs on IA there are choices including BIOS (IBVs), the Intel® BLDK, or developing your own boot loader (the how-to is documented in depth in the Break Away with Intel® Atom™ Processors book. For projects that will design their own board, an on-chip debugger (JTAG) is required. Depending on the feature and OS support requirements of the project, the developers can choose from several JTAG vendors products ranging from end-to-end solutions, standalone, or low cost. All of these considerations will be discussed in later slides. 系统架构 步骤4,5是可选项 Break Away with Intel® Atom™ Processors: Chapter 4

字节序(Endianness )和执行的差异 10 字节序(Endianness )和执行的差异 Byte Address 1 2 3 12 34 56 78 BE Machine ap &a %> gcc foo.c %> ./a.out %> 12 12345678 Example foo.c #include <stdio.h> int a = 0x12345678; int main() { char *ap = (char *) &a; printf("%2x %x\n", *ap, a); return 0; } Byte Address 1 2 3 78 56 34 12 LE Machine %> gcc foo.c %> ./a.out %> 78 12345678 &a Different results on BE and LE machines! Endianness is one of the main processor architecture differences to be considered when migrating source code. Other differences include instruction set architecture (ISA), interrupt and exception handling. This slide shows an example of how software that is hardcoded for big-endian memory architecture will not execute with correct results when run on a little-endian processor. Portable code is written to be endian-neutral, which can be compiled for either big-endian or little-endian platforms. If the code to be migrated is big-endian, then changes will need to be made to the source code in places where multibyte data is sent to or received from external sources to make sure it is handled appropriately for the little-endian architecture. Examples: network and file I/O. Goal: Provide a simple C code example that will cause an endianness issue. Key takeaway: You can get different answers depending on which endian architecture the code is executed on. Points to be made: Do not assume Endianness or your code could run incorrectly on one architecture vs. another. Best method is to abstract the hardware by writing endian neutral code. The “Break Away with Intel® Atom™ Processors: A Guide to Architecture Migration” book provides details in chapter 4 about the software implications of endianness and how to write endian neutral code. Endian neutral code can be compiled to run correctly for platforms of either endianness. ap Endian neutral code is portable Break Away with Intel® Atom™ Processors: Chapter 4 10

PowerPC* 与英特尔® 架构在架构上的差异 指令 PowerPC* 与英特尔® 架构的指令有很大的差异。有些指令不存在一对一的对应关系。请参考Intel® 64 and IA-32 Architectures Software Developer Manuals 对齐(Alignment) PowerPC 的指令长度都是4字节,必须定位在4字节边界上。而英特尔架构指令长度可变,因此没有对齐的要求。 在 PowerPC 的机器上,布尔(bool)型数据的长度是4字节。而在英特尔架构的机器上bool 型数据的长度为1个字节。为了保证代码的通用性,应将 PowerPC 上代码中bool型数据定义成32位无符号整型。 面向矢量指令(Vector Oriented Instructions) PowerPC 使用Altivec*指令,而英特尔架构使用单指令多数据流扩展指令SSE 除零错误处理(Divide-by-zero) 对整数除零,PowerPC 返回0。英特尔架构认为这是致命错误而返回异常。 调用约定(Calling Conventions Specified by ABI) 在 PowerPC 上,参数用寄存器传递。英特尔架构的寄存器数目比 PowerPC 少,参数使用堆栈传递。局部变量也存储在堆栈中。 字节序(Endianness) PowerPC 是双字序(主要被配置成大端)。英特尔架构是小端 比特序 PowerPC 视字节序来定比特序,英特尔架构是升序排列 These are the other architecture differences to be considered for PowerPC*. 我们对"endianness"这个名词估计都很熟悉了。它首先被Danny Cohen于1980引入,用来表述计算机系统表示多字节整数的方式。   endianness分为两种:大端和小端。(从字节序的角度来看)大端方式是将整数中最高位byte存放在最低地址中。而小端方式则相反,将整数中的最高位byte存放在最高地址中。 对于某个确定的计算机系统,比特序通常与字节序保持一致。换言之,在大端系统中,每个byte中最高位bit存放在内存最低位;在小端系统中,最低位bit存放在内存最低位。 在设计计算机系统时,应该尽一切可能避免通过软件方式执行bit换位,因为这样不仅会产生巨大开销,也是件令程序员感到乏味的工作。 (http://blog.csdn.net/lovekatherine/article/details/1564731) More Details in the PowerPC* to Intel® architecture Migration White Paper *文中涉及的其它名称及商标属于各自所有者资产。

ARM* 与英特尔® 架构在架构上的差异 指令 ARM* 与英特尔® 架构的指令有很大的差异。有些指令不存在一对一的对应关系。请参考Intel® 64 and IA-32 Architectures Software Developer Manuals 对齐(Alignment) ARM有对齐的要求,因数据类型而异。例如4字节整型要在4字节边界上。 结构大小与对齐。例如,3个字符的结构在IA上占3个字节,而在ARM上会占有4个字节。 面向矢量指令(Vector Oriented Instructions) ARM 使用矢量浮点指令Vector Floating Point (VFP) instructions, Advance SIMD (NEON), DSP Enhanced Instructions.英特尔架构使用Intel® Streaming SIMD Extensions (Intel® SSE). 有符号与无符号字符 字符型在英特尔架构上是有符号数,在ARM上是无符号数 调用约定(Calling Conventions Specified by ABI) ARM通过寄存器和堆栈来传递参数。 英特尔架构通过堆栈来传递。 字节序(Endianness) ARM 可配成大端系统或小端系统。英特尔架构是小端系统。 Bit Fields ARM视字节序来定比特序,英特尔架构是升序排列 These are the other architecture differences to be considered for ARM*. *文中涉及的其它名称及商标属于各自所有者资产。.

软件开发工具

Break Away with Intel® Atom™ Processors: Chapter 4 英特尔® 软件开发产品 Intel® C++ Compiler for Windows* Intel® Integrated Performance Primitives (Intel® IPP) Library Intel® VTune™ Performance Analyzer Intel® Parallel Studio Intel® Threading Building Blocks Intel® Embedded Software Development Tool Suite Intel® Application Software Development Tool Suite Intel® C++ Compiler Professional Edition for QNX* Neutrino* RTOS Windows* Moblin*/Linux* RTOS “应用套件“ 为ISV和Moblin社区 - 优化Moblin应用,使其在基于英特尔® 凌动™ 处理器的平台上有更好的性能和更长的电池续航时间 “嵌入套件“ 为OEM/ODMs及主要ISV和OSV - 提供包含JTAG调试器的嵌入系统及应用开发完整解决方案 http://software.intel.com/software/products/atomtools Intel provides a wide variety of sw development products for Intel architecture, including the Intel® Embedded Software Development Tool Suite for Intel® Atom™ Processors. These tools include the Intel C/C++ Compiler, Intel Integrated Performance Primitives library, Intel VTune Performance Analyzer and threading tools. Break Away with Intel® Atom™ Processors: Chapter 4 *文中涉及的其它名称及商标属于各自所有者资产。. 14

Intel® Integrated Performance Primitives Compiler 英特尔® 集成性能原件库 Intel® Vtune™ Performance Analyzer Intel® Integrated Performance Primitives 高度优化的多媒体函数 图像及视频 通讯及信号处理 数据处理 充分利用 英特尔® 无线 MMX™ 技术 Intel® Streaming SIMD Extensions 2, Intel® Streaming SIMD Extensions 3 多核/超线程技术 快速应用开发 跨平体兼容及代码复用 出色性能 Intel(R) Integrated Performance Primitives (Intel (R) IPP). It is an extensive library of highly optimized software functions covering 15 major domains of functionality for multimedia, data processing and communications applications. The 15 domains can be divided into three main groups: image, signal and data processing. The picture on the right hand side list the various domains. These functions are optimized for the Atom processor but there are similar IPP libraries optimized for other IA architectures hence you can easily have portable code and platform compatibility. You can use the same API for your MID application as for the PC application. The Intel (R) IPP supply a broad range of functions for multimedia, audio codecs, video codecs, image compression, image processing, signal processing, speech compression, computer vision and math support routines. Optimized for Intel® Atom™ Processor 使用英特尔® 集成性能原件库可将工作重点从优化应用性能转到新功能的开发 Break Away with Intel® Atom™ Processors: Chapter 7

Boot Loader与传统BIOS的比较 Open Box Designs (Requires Flexibility) Boot Loader Closed Box Designs (Static Hardware Configurations) Standard OS compatibility Feature richness Open to many use cases Multiple boot paths Extra services and support Custom OS & applications Basic Intel® architecture initialization Quick and small Single use case Limited boot options No frills Royalty free No hand-holding BIOS is an easy solution that comes at a price. Normally used for open box designs (flexible feature configurations and Os support). Boot loaders are generally used for closed box designs and can be royalty free if you develop them yourself – however development comes at a resource cost. If the end product/application requires flexible configurations, then BIOS could be the right choice. If it requires minimal configuration, then a boot loader could be the right choice. Custom boot loaders: Custom OS & applications Basic IA initialization Quick and small Single use case Minimal upgrade/expansion capabilities Tuned to: targeted OS specific app function set For the Do It Yourself (DIY) folks, get procedures in the new Intel Press book “Break Away with Intel® Atom™ Processors.” They will need an RSNDA for the MRC, but this slide raises awareness that we provide the information to develop your own boot loader. Although the recommendation from Intel is to use a vendor solution. Break Away with Intel® Atom™ Processors: Chapter 5 16

利用N.A. Software*实现AltiVec* 到 Intel® Streaming SIMD Extensions移植 N.A. Software提供3个工具来帮助用户在 Linux* 和Wind River* VxWorks* 操作系统上将高度优化的基于AltiVec* 的软件转换成基于Intel® Streaming SIMD Extensions指令集的软件。这将降低数字信号处理软件的移植工作。 Vector Signal Image Processing Library (VSIPL) Altivec.h include file for Intel® architecture Altivec assembler to Intel® compiler assembler 可从Intel® 嵌入设计中心下载 N.A. Software Conversion Tool download (Altivec SIMD Macros Translator) N.A. Software* Conversion Tools AltiVec/ Intel Streaming SIMD Extensions Migration Guide Tools For Moving AltiVec DSP Applications to Intel® Processors - Presentation Tools for Moving Altivec DSP Application to Intel Processors – Audio Enable Presentation N.A. Software* provides three architecture conversion tools for migrating vector oriented code. N.A. Software Vector Oriented Code Conversion Tools Converting existing highly optimized AltiVec* software to Intel® architecture SSE can be a daunting task. Intel is working with N.A. Software* Vector Oriented Code Conversion Tools to bring three tools to market for Linux* and Wind River* VxWorks* operating systems, which will reduce the Digital Signal Processing (DSP) software conversion effort. 1. Vector Signal Image Processing Library (VSIPL) - Highly efficient computational middleware for signal and image processing applications. VSIPL is an Open standard for embedded signal and image processing software and hardware vendors. It abstracts hardware implementation details; applications are portable across processor types and generations without rewriting the software. This tool will be available as the VSIPL library, or as C-VSIPL, the plain “C” equivalent for in house libraries that need to be converted. N.A.Software will also port custom inhouse DSP libraries to Intel® architecture. AVAILABLE NOW by request– will be on EDC for download by ww21 2. Altivec.h include file for Intel® Architecture – Same as the PPC altivec.h, but targets the Intel® SSE instruction set instead of Altivec. Application’s DSP code remains unchanged. AVAILABLE NOW by request– will be on EDC for download by ww21 3. Altivec Assembler to Intel® Assembler-Compiler – Converts small(ish) blocks of PPC Altivec assembler into C code, which can then be compiled into IA SSE assembler code. Break Away with Intel® Atom™ Processors: Chapter 4 *文中涉及的其它名称及商标属于各自所有者资产。.

有效地降低将嵌入应用移植到英特尔® 架构平台所需的检测和代码修改工作量 带转换和字节序检查的静态代码分析工具 用于代码开发的静态代码分析工具 包含高效的转换工具来实现字节序检查实现将代码移植到IA平台上 代码移植分析检查工具 例如:字节序隐患,并行分析等 Flags endianness/non-Intel® architecture areas 现已上市! Available in Klocwork Insight* 9.2 and Insight Pro 2.2 Klockwork* is a static code analysis tool that simplifies architecture migration by providing NEW features that check for endianness portability issues. Use the endian checkers to identify where the issues are in the code to be ported and then manually update the code. Understanding what lines of code might have issues Klocwork is a productivity enhancement tool that allows the customer to identify line by line, the error and type of error they should anticipate. There may times when it is up to the developer must make the decision to modify the flagged code, but the developer is always informed. For more information: http://www.klocwork.com/products/documentation/current/What's_New#New_C.2FC.2B.2B_checkers Endian analysis – identifies instances where multibyte values are not converted when being either sent or received by/from network or host Deadlock checking – identifies instances across a systems where loops in the lock lifecycle graph exist, creating a deadlock situation Porting Checks – identifies instances where the code is relying on specific implementation details unique to various compilers Product Documentation: • http://www.klocwork.com/products/documentation/current/What's_New#New_C.2FC.2B.2B_checkers Whitepapers: • New C/C++ Multicore, multiprocessor design checkers: http://www.klocwork.com/products/documentation/current/What's_New#New_C.2FC.2B.2B_checkers Multicore and Endianenss White Paper: http://www.klocwork.com/resources/endian-deadlock-multicorechallenges 有效地降低将嵌入应用移植到英特尔® 架构平台所需的检测和代码修改工作量 *文中涉及的其它名称及商标属于各自所有者资产。

功耗和性能优化

Break Away with Intel® Atom™ Processors: Chapter 8 性能优化 多核 使用多核软件开发工具 使用支持多核的性能库 多线程并行化 将共享数据的线程安排在共享Cache的核中 编译器性能参数 使用针对英特尔凌动处理器的目标选项 (-xSSE3_ATOM ) 使用自动向量化(-vec) 使用-O3 选项来实现循环内有大量内存访问的优化 进程间优化(IPO) 使用PGO优化(PGO) 工具 英特尔® 软件开发产品 分析工具 多线程工具 调试器 Here’s some tips on using compiler switches to provoke the compiler to produce the best instructions for the Intel® Atom™ processor. Depending on how critical the performance needs are, there are options for advanced optimization such as IPO, which can do things line create inline instructions for better performance, or PGO, which can for example put the instructions in the best order as in a switch statement – you want to put the most likely case at the top of the switch. See the backup section (slides 43-45) for specifics related to Power Guidelines. 例子: -O3 -ipo -no-prec-div -xSSE3_Atom -prof_gen -prof_use Break Away with Intel® Atom™ Processors: Chapter 8

Break Away with Intel® Atom™ Processors: Chapter 8 处理器电源状态 CPU Active P0 - CPU active at highest frequency (HFM) Pn - CPU active at lowest frequency (LFM) C0 - CPU active (In any P-state) P0 C0 P1 Pn C1 - Core clock is Off C3/C4 - Reduced Voltage, Partial L2 cache flush C6 - Core Off, L2 cache flush, state saved to SRAM C1 CPU Sleep C2 C3 C4 Intro to C states C0 – cpu active – any p-state C1 – core clock is off C6 – core off, L2 cache flush, state saved to SRAM. But note that the deeper the sleep, the longer it takes for the processor to wake up Read more about C states in the processor data sheet specification. C5 处理器休眠得越深,唤醒所需的时间就越长 C6 Break Away with Intel® Atom™ Processors: Chapter 8

Break Away with Intel® Atom™ Processors: Chapter 8 为降低功耗,软件应注意的事项 Power Guidelines Hurry up and get idle Reduce interrupts Improve cache locality Use timers effectively Manage memory efficiently Be power-aware and power-smart Avoid polling and busy waits Use multithreading Here’s some tips on using compiler switches to provoke the compiler to produce the best instructions for the Intel® Atom™ processor. Depending on how critical the performance needs are, there are options for advanced optimization such as IPO, which can do things line create inline instructions for better performance, or PGO, which can for example put the instructions in the best order as in a switch statement – you want to put the most likely case at the top of the switch. See the backup section (slides 43-45) for specifics related to Power Guidelines. Break Away with Intel® Atom™ Processors: Chapter 8

线程优化来提高电源效率 Stagger thread start - execute in parallel - sleep longer Special care is needed when employing multi-core technology to align activity. Synchronize multiple threads to interrupt at the same time. This figure shows two sets of runtime behavior of two threads executing a video playback application comprised of decode and rendering steps. The first set corresponds to the top two timelines labeled Thread 1 and Thread 2 and the second set corresponds to the bottom two timelines. Thread 1 is tasked with the decoding portion of application. Thread 2 is tasked with the rendering portion of the application. Processor active time is indicated by the rectangles between Thread 1 and Thread 2 on the timelines. Stagger thread start - execute in parallel - sleep longer Break Away with Intel® Atom™ Processors: Chapter 8

英特尔® 凌动™ 处理器 E6xx 系列

基于英特尔® 凌动™ 处理器 E6xx 系列的平台 Break Away with Intel® Atom™ Processors: Chapter 3 *文中涉及的其它名称及商标属于各自所有者资产。

英特尔® 凌动™ 处理器 E6xx 系列(SOC) Intel® Atom™ Processor 0.6GHz to 1.6GHz 45 nm High K Process L1: 24K Data, 32K Instruction; L2: 512KB Enhanced Intel SpeedStep® Technology Intel® Hyper-Threading Technology and Intel® Virtualization Technology (Intel® VT) for IA-32, enabled CPU Core Memory Controller 2D/3D Graphics Integrated Graphics Up to 400MHz Supports OpenGL* ES2.0, OpenVG* 1.1 Memory Support DDR2 800 MT/s 8 devices, up to 2GB 32-bit, Single Channel Memory down only Intel® High Definition Audio Display Controller Dual Display 24-bit single channel LVDS and SDVO Hardware Video Engine Legacy Controller Video Engine H/W accelerated video encode & decode Encode format: MPEG4, H.264 Decode format: MPEG2, MPEG4, VC1, WMV9, H.264 PCI Express* Technology (PCIe*) Four x1 lanes (4 ports) Interface to IOH or any other PCIe* devices PCIe* Break Away with Intel® Atom™ Processors: Chapter 3 *文中涉及的其它名称及商标属于各自所有者资产。

英特尔® 凌动™ 处理器 E6xx 系列的不同型号 Commercial Temperature Industrial Temperature Core Frequency (GHz) Graphics Frequency (MHz) Video Encode Thermal Design Power (W) 1.6 400 Yes 4.5* 1.3 3.6 1.0 320 0.6 No 3.3* Intel® Atom™ Processor E680 Intel® Atom™ Processor E680T Intel® Atom™ Processor E660 Intel® Atom™ Processor E660T Intel® Atom™ Processor E640 Intel® Atom™ Processor E640T Intel® Atom™ Processor E620 Intel® Atom™ Processor E620T *pre-silicon estimates Find and compare Intel ® product information at: http://ark.intel.com/ Break Away with Intel® Atom™ Processors: Chapter 3 27

英特尔® 凌动™ 处理器 E6xx 系列支持的操作系统 Microsoft* Windows* XP SP3 Windows* CE 6.0 R3 Windows* Embedded Standard 2009 Windows* Embedded for POS SP3 Windows* 7 and WES7* Linux* Fedora* 11 Kernel 2.6.29 X-Server 1.6, DRI2 MeeGo* 1.0 Wind River* Linux* Real Time OS QNX* Neutrino* WindRiver* VxWorks* For Intel architecture, Intel enables multiple OS choices. These are the OSs that officially support the E6xx. We believe there are other OSs that have successfully installed on the E6xx, which are not listed here. For example: IVI and Microsoft Auto*. Red Hat Embedded was removed as it’s only for Menlow. POR for the Intel® Atom® Processor E6xx Series include: Microsoft* and for Linux* (Fedora and MeeGo) The rest of the OSs support it, but are not POR. Break Away with Intel® Atom™ Processors: Chapter 6 *文中涉及的其它名称及商标属于各自所有者资产。 28

视频与图形

英特尔® 凌动™ 处理器 E6xx 系列(SOC) CPU Core Memory Controller 2D/3D Graphics Integrated Graphics Up to 400MHz Supports OpenGL* ES2.0, OpenVG* 1.1 Intel® High Definition Audio Display Controller Dual Display 24-bit single channel LVDS and SDVO Video Engine H/W accelerated video encode & decode Encode format: MPEG4, H.264 Decode format: MPEG2, MPEG4, VC1, WMV9, H.264 Hardware Video Engine Legacy Controller PCIe* Break Away with Intel® Atom™ Processors: Chapter 4 & 7 *文中涉及的其它名称及商标属于各自所有者资产。

视频及图形特色 英特尔® 凌动™ 处理器 E6xx 系列提供: 超低功耗集成3D图形核 硬件全高清视频编码/解码引擎,支持H.264, MPEG1/2/4, VC1/WMV9 高清解码. 将英特尔®凌动™ 处理器核从视频处理中释放处理。 英特尔建议开发者选取适当的媒体播放器来利用 英特尔® 凌动™ 处理器上的硬件视频加速引擎 Break Away with Intel® Atom™ Processors: Chapters 4 & 7

Break Away with Intel® Atom™ Processors: Chapters 4, 5, 7 基于英特尔® 凌动™ 处理器的平台图形特色 图形功能 优点 基于硬件的视频加速引擎 硬件支持如下视频压缩标准: H.264 Baseline profile L3, Main profile L4.1, High profile L4.1 MPEG2 Main profile high level MPEG4 Simple profile L3, Advanced simple profile L5 VC1 all profiles up to L3 WMV9 Simple profile Medium level WMV9 Main profile High level 放弃软件编解码器,释放CPU资源 支持32 bit 浮点运算 高图形质量 UMA 内存架构 减小板空间及成本 显示支持 Dual Display Pipe with rotation support LVDS + SDVO for display output Supports Extended Desktop or Clone Mode 稳定的显示控制器提供更高的灵活性 Based on Menlow Platform Break Away with Intel® Atom™ Processors: Chapters 4, 5, 7

英特尔® 凌动™ 处理器 E6xx 系列图形加速器 Deferred Pixel Shading Key Features Flexible Programmable Architecture Shader based technology 3D Graphics 2D and advanced 2D Graphics Video decode support Image processing Deferred Pixel Shading High Performance Low Power Industry standard tool support Comprehensive OS/API support All 3 Surfaces Filled Only Visible Surface Filled Deferred Pixel Shading Conventional 3D Intel® Atom™ Processor E6xx Series Based on Menlow Platform Break Away with Intel® Atom™ Processors: Chapter 3 & 7

Tiling Benefits – 最高图像质量 内部真彩色处理-32bit 浮点 The Intel® Atom™ processor E6xx series graphics core uses its on-chip tile buffer to process pixels at arbitrary pixel precisions up to 32 floating point even though the external frame buffer can be as low as 16-bit Blending using 16bpp Distinct visible artefacts Blending using 32bpp Internal True Color More accurate visual results

Break Away with Intel® Atom™ Processors: Chapter 2 & 5 LVDS 差分接口连接本地平板显示器 支持18-bit 或24-bit 彩色 最高像素时钟80MHz 平板显示器时序必须被vBIOS所支持 如果默认vBIOS不支持,EMGD 现有工具可修改时序,实现对新显示器支持 Break Away with Intel® Atom™ Processors: Chapter 2 & 5 35

Break Away with Intel® Atom™ Processors: Chapter 2 & 5 SDVO 单SDVO 通道 用于任意外部显示 HDMI/DVI, Analog TV, VGA/CRT, LVDS 支持高达160 MHz像素时钟 等同 1280x1024 @ 85Hz 接口物理上可支持更高时钟频率 包含1920x1080p @60Hz (降低消隐) Break Away with Intel® Atom™ Processors: Chapter 2 & 5 36

参考资料 MeeGo* Web Site www.meego.com Intel AppUpSM Developer Program http://appdeveloper.intel.com/ Intel® Atom™ Processor Microarchitecture http://www.intel.com/technology/atom/microarchitecture.htm Intel Atom Processor Web Site http://www.intel.com/products/processor/atom/index.htm Intel® Embedded Design Center http://edc.intel.com/ Intel Press book: “Break Away with Intel® Atom™ Processors” http://www.intel.com/intelpress/sum_ms2a.htm Intel® Product Information http://ark.intel.com/ Intel® 64 and IA-32 Architectures Software Developer's Manuals http://developer.intel.com/products/processor/manuals/ Intel® Software Network http://software.intel.com Intel® Tools for Intel Atom Processors http://software.intel.com/en-us/articles/intel-tools-for-intel-atom-processors/ N.A. Software* Conversion tools http://www.nasoftware.co.uk/home/index.php/products/conversion-tools Klocwork Insight* code productivity tools http://www.klocwork.com/products/insight/ Video Encoding Accelerator Solution for Intel® Atom™ Processor E6xx Series http://download.intel.com/design/intarch/PAPERS/324328.pdf *文中涉及的其它名称及商标属于各自所有者资产。

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