2016.06.15. 一、 針對一個只有兩個可能事件 (x1,x2) 的系統，其機率分別為 (P(x1),P(x2)) 計算當 (P(x1),P(x2)) 分別為 : (0, 1) 、 (0.1, 0.9) 、 (0.2, 0.8) 、 (0.3, 0.7) 、 (0.4, 0.6) 、 (0.5,

Presentation on theme: "2016.06.15. 一、 針對一個只有兩個可能事件 (x1,x2) 的系統，其機率分別為 (P(x1),P(x2)) 計算當 (P(x1),P(x2)) 分別為 : (0, 1) 、 (0.1, 0.9) 、 (0.2, 0.8) 、 (0.3, 0.7) 、 (0.4, 0.6) 、 (0.5,"— Presentation transcript:

1 2016.06.15

2 一、 針對一個只有兩個可能事件 (x1,x2) 的系統，其機率分別為 (P(x1),P(x2)) 計算當 (P(x1),P(x2)) 分別為 : (0, 1) 、 (0.1, 0.9) 、 (0.2, 0.8) 、 (0.3, 0.7) 、 (0.4, 0.6) 、 (0.5, 0.5) 、 (0.6, 0.4) 、 (0.7, 0.3) 、 (0.8, 0.2) 、 (0.9, 0.1) 、 (1, 0) 的熵值， (a) 以 P(x1) 為橫軸、熵值為縱軸，使用這 10 個熵值畫一近似曲線圖。 (b) 以 P(x2) 為橫軸、熵值為縱軸，使用這 10 個熵值畫一近似曲線圖。 Fig. 1Fig. 2 (a)(b) IdP(X1)P(X2)Entropy 1010 20.10.90.468996 30.20.80.721928 40.30.70.881291 50.40.60.970951 60.5 1 70.60.40.970951 80.70.30.881291 90.80.20.721928 100.90.10.468996 11100 Table 1

3 二、 翻譯以下內容為中文： We will make two additional assumptions to further simplify our specification. First, we will design our machine so it does not give change. A customer who pays with two dimes will lose the five extra cents! Second, we will expect our machine to be reset before each new use. 我們將做出兩個額外的假設，以進一步簡化我們的規格。首先，我們將為我們的機器設計 成不找零錢。一位顧客用兩個硬幣 ( 20 cents ) 支付將會失去額外的 5 cents ！第二，我們將要 求我們的機器在每一位新顧客使用之前進行重置。

4 三、 Design a 3-bit cyclic counter with sequences 0,2,4,5,6,7 (a)Use D FFs and draw the resultant circuit (b)Use T FFs and draw the resultant circuit (c)Use J-K FFs and draw the resultant circuit (d)Draw the complete state diagram for the circuit in (a),(b),(c) (e)In (a), is the circuit self-starting? (a) CBADCDBDA 000010 001XXX 010100 011XXX 100101 101110 110111 111000 CB A 0111 XX01 CB A 1010 XX01 CB A 0011 XX00 DC = BA’ + CB’ DB = C’B’ + B’A + CBA’ DA = CA’ 00 01 11 10 0101 0101 0101

5 DC = BA’ + CB’DB = C’B’ + B’A + CBA’ DA = CA’ DQ CLKQ DQ CLKQ DQ CLKQ Count DCDB DA C \C \B \A BA

6 (b) Use T FFs and draw the resultant circuit CBATCTBTA 000010 001XXX 010110 011XXX 100001 101011 110001 111111 CB A 0100 XX10 TC = C’B + BA 00 01 11 10 0101 CB A 1100 XX11 TB = C’ + A 00 01 11 10 0101 CB A 0011 XX11 TA = C 00 01 11 10 0101

7 TQ CLKQ TQ CLKQ TQ CLKQ Count TCTB C C \C \B \A BA TC = C’B + BATB = C’ + A TA = C

8 (c) Use J-K FFs and draw the resultant circuit CBAJC KCJB KBJA KA 0000 X1 X0 X 001X XX XX X 0101 XX 10 X 011X XX XX X 100X 00 X1 X 101X 01 XX 1 110X 0X 01 X 111X 1X 1X 1

9 CB A XX00 XX10 KC = BA 00 01 11 10 0101 CB A X10X XX1X KB = C’ + A 00 01 11 10 0101 CB A XXXX XX11 KA = 1 00 01 11 10 0101 CB A 01XX XXXX JC = B 00 01 11 10 0101 CB A 1XX0 XXX1 JB = C’ + A 00 01 11 10 0101 CB A 0011 XXXX JA = C 00 01 11 10 0101

10 JQ K CLKQ JQ K CLKQ JQ K CLKQ Count BJB C C \C \B \A BA KCKB KC = BAKB = C’ + AKA = 1 JC = BJB = C’ + AJA = C +

11 (a)CBADCDBDA 000010 001XXX 010100 011XXX 100101 101110 110111 111000 CB A 0111 X 0X 001 CB A 1010 X 1X 001 CB A 0011 X 0X 000 DC = BA’ + CB’ DB = C’B’ + B’A DA = CA’ 00 01 11 10 0101 0101 0101 CBADCDBDA 000010 001010 010100 011000 100101… 3 0 1 27 46 5 (d)Draw the complete state diagram for the circuit in (a),(b),(c)

12 (b) CBATCTBTA 000010 001XXX 010110 011XXX 100001 101011 110001 111111 CB A 0100 X 0X 110 TC = C’B + BA 00 01 11 10 0101 CB A 1100 X 1X 111 TB = C’ + A 00 01 11 10 0101 CB A 0011 X 0X 011 TA = C 00 01 11 10 0101 CBATCTBTA 000010 001010 010110 011110 100001 101011… 0 27 1 46 3 5

13 (c) CBAJC KCJB KBJA KA 0000 X1 X0 X 001X XX XX X 0101 XX 10 X 011X XX XX X 100X 00 X1 X 101X 01 XX 1 110X 0X 01 X 111X 1X 1X 1 CBAJC KCJB KBJA KA 0000 X1 X0 X 0010 01 10 1 0101 XX 10 X 0111 11 10 1 100X 00 X1 X…

14 CB A XX00 X 0 X 110 KC = BA 00 01 11 10 0101 CB A X10X X 1 X 1 1X KB = C’ + A 00 01 11 10 0101 CB A XXXX X 1 X 1 11 KA = 1 00 01 11 10 0101 CB A 01XX X 0X 1XX JC = B 00 01 11 10 0101 CB A 1XX0 X 1 X 1X1 JB = C’ + A 00 01 11 10 0101 CB A 0011 X 0 X 0 XX JA = C 00 01 11 10 0101 0 1 27 3 46 5

15 (e)In (a), is the circuit self-starting? YES 3 0 1 27 46 5

16 四、 Design a counter running at normal sequence of 0, 2, 3, 5, 6 (a) Use J-K flip-flops by directing all illegal states to state 5 (b) Use D flip-flops by directing all illegal states to state 5 (c) Use T flip-flops by directing all illegal states to state 5 (a) CBAJC KCJB KBJA KA 0000 X1 X0 X 0011 X0 XX 0 0100 XX 01 X 0111 XX 1X 0 100X 00 X1 X 101X 01 XX 1 110X 1X 10 X 111X 0X 1X 0

17 CB A XX10 XX00 KC = BA’ 00 01 11 10 0101 CB A X01X X11X KB = C + A 00 01 11 10 0101 CB A XXXX 0100 KA = C’B 00 01 11 10 0101 CB A 00XX 11XX JC = A 00 01 11 10 0101 CB A 1XX0 0XX1 JB = C’A’ + CA 00 01 11 10 0101 CB A 0101 XXXX JA = C’B + CB’ 00 01 11 10 0101

18 JQ K CLKQ JQ K CLKQ JQ K CLKQ Count A JB JA C \C \B \A BA KCKB KC = BA’KB = C + AKA = C’B JC = AJB = C’A’ + CAJA = C’B + CB’ KA

19 (b) Use D flip-flops by directing all illegal states to state 5 CBADCDBDA 000010 001101 010011 011101 100101 101110 110000 111101 CB A 0001 1111 CB A 1100 0001 CB A 0101 1110 DC = A + CB’ DB = CB’A + C’A’ DA = C’B + C’A + BA + CB’A’ 00 01 11 10 0101 0101 0101

20 DC = A + CB’DB = CB’A + C’A’DA = C’B + C’A + BA + CB’A’ DQ CLKQ DQ CLKQ DQ CLKQ Count DCDB DA C \C \B \A BA

21 (c) Use T flip-flops by directing all illegal states to state 5 CBATCTBTA 000010 001100 010001 011110 100001 101011 110110 111010 CB A 0010 1100 TC = C’A + CBA’ 00 01 11 10 0101 CB A 1010 0111 TB = C’B’A’ + BA + CB + CA 00 01 11 10 0101 CB A 0101 0001 TA = C’BA’ + CB’ 00 01 11 10 0101

22 TQ CLKQ TQ CLKQ TQ CLKQ Count TCTB TA C \C \B \A BA TC = C’A + CBA’ TB = C’B’A’ + BA + CB + CA TA = C’BA’ + CB’

23 六、 Complete the waveforms of Q1 and Q2

24 六、 Design a 5:32 decoder, using some 3:8 decoders and a 2:4 decoder  5:32 decoder  1x2:4 decoder  4x3:8 decoders 0A'B'C'D'E' 1 2 3 4 5 6 7 S2 3:8 DEC S1S0 AB 01230123 S1 2:4 DEC S0 F 0 1 2A'BC'DE' 3 4 5 6 7 S2 3:8 DEC S1S0 E CD 0AB'C'D'E' 1 2 3 4 5 6 7AB'CDE 3:8 DEC 0 1 2 3 4 5 6 7ABCDE E CD S2S1S0S2 3:8 DEC S1S0

25 七、 Minimize the number of states for the three-bit sequence (010 or 110) detector. Input: X = {0, 1}, Output: Z = {0, 1} S0S0 S1S1 S2S2 S3S3 S4S4 S5S5 S6S6 Reset/0 0/0 1/0 0/0 1/0 0/11/0 0/0 1/0 0/1 1/0

26 Input Sequence Reset 0 or 1 00 or 10 01 or 11 Present State S0S0 S1’S1’ S3’S3’ S4’S4’ X=0 S1’S1’ S3’S3’ S0S0 S0S0 X=1 S1’S1’ S4’S4’ S0S0 S0S0 X=0 0 0 0 1 X=1 0 0 0 0 Next StateOutput S1’S1’ S0S0 S3’S3’ S4’S4’ 0,1/0 0/0 1/0 0/0 0/1 1/0 Reset/0

27 八、 Draw a state diagram for an odd parity checker using Moor machine S 0 /0 0 1 0 1 Reset S 1 /1

28 九、 Draw a state diagram for an odd parity checker using Mealy machine S0S0 S1S1 0/0 1/1 0/1 1/0 Reset/0

29 十、 Draw a state diagram for a vending machine using Moor machine, given that (i) Release item after 15 cents are deposited. (ii) Single coin slot for dimes, nickels. (iii) No change. 0¢ [0] 10¢ [0] 5¢ [0] 15¢ [1] N’ D’ + Reset D D N N+D N N’ D’ Reset’ N’ D’ Reset D ： dimes N ： nickels

30 Good Luck to your Final Exam!