大安高工 電子科 張 洧 資料提供 臺灣科技大學 電子工程系 陳伯奇教授

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1 大安高工 電子科 張 洧 2008.4.8 資料提供 臺灣科技大學 電子工程系 陳伯奇教授
高瞻計畫 - IC製程簡介 大安高工 電子科 張 洧 資料提供 臺灣科技大學 電子工程系 陳伯奇教授

2 CMOS 製程介紹

3 CMOS 製程介紹 IC built on silicon substrate :
some structures diffused into substrate. other structures built on top of substrate. Substrate regions are doped with n-type and p-type impurities. (n+ = heavily doped) Wires made of polycrystalline silicon (poly), multiple layers of aluminum (metal). Insulator - Silicon Dioxide (SiO2) Used to insulate transistor gates (thin oxide) Used to insulate layers of wires (field oxide) Can be grown on Silicon or Chemically Deposited

4 AMD’s Dresden Fab - Source: AMD Corporation www.amd.com
CMOS 製程介紹 A View of the Cleanroom AMD’s Dresden Fab - Source: AMD Corporation

5 CMOS 製程介紹 (Wafer晶圓) 拋光 磨盤 清洗 切割

6 CMOS 製程介紹 (Photolithography光罩)
Coat wafer with photoresist (PR) Shine UV light through mask to selectively expose PR Now use exposed areas for Selective doping Selective removal of material under exposed PR Mask UV Light Photoresist Wafer

7 CMOS 製程介紹 (0.25 micron transistor)
poly source/drain gate oxide

8 CMOS 製程介紹

9 CMOS 製程介紹 (Example : NOT Gate)

10 NOT Gate – Step 1 Form N-Well regions Grow oxide (長氧化層 )
Deposit photoresist (沈積光阻) photoresist oxide p-type substrate Cross section view NWELL mask Layout view

11 NOT Gate – Step 1 Form N-Well regions Grow oxide (長氧化層 )
NWELL mask Form N-Well regions Grow oxide (長氧化層 ) Deposit photoresist (沈積光阻) Pattern photoresist NWELL Mask expose only n-well areas (使用NWELL光罩曝 光產生工作區) photoresist oxide p-type substrate Cross section view NWELL mask Layout view

12 NOT Gate – Step 1 Form N-Well regions Etch oxide (去除氧化層)
Remove photresist (移除光阻) Diffuse n-type dopants through oxide mask layer (在沒有氧化層的區 域，摻雜n型元素形 成N-Well ) n-well p-type substrate Cross section view Layout view

13 NOT Gate – Step 2 Form Active Regions Deposit SiN over wafer (沈積氮化矽)
ACTIVE mask Form Active Regions Deposit SiN over wafer (沈積氮化矽) Deposit photoresist over SiN layer (沈積光阻) n-well photoresist SiN silicon nitride 氮化矽 p-type substrate ACTIVE mask

14 NOT Gate – Step 2 (使用ACTIVE光罩曝 光產生作用區) Form Active Regions
ACTIVE mask Form Active Regions Deposit SiN over wafer (沈積氮化矽) Deposit photoresist over SiN layer (沈積光阻) Pattern photoresist ACTIVE MASK (使用ACTIVE光罩曝 光產生作用區) n-well photoresist SiN p-type substrate ACTIVE mask

15 NOT Gate – Step 2 (使用ACTIVE光罩曝 光產生作用區) Form Active Regions
Pattern photoresist ACTIVE MASK (使用ACTIVE光罩曝 光產生作用區) Etch SiN in exposed areas leaves SiN mask which blocks oxide growth (移除氮化矽準備產 生厚氧化層) n-well photoresist SiN p-type substrate ACTIVE mask

16 NOT Gate – Step 2 Form Active Regions Remove photoresist (移除光阻)
Grow Field Oxide FOX (長厚氧化層 ) Remove SiN (移除氮化矽) n-well FOX p-type substrate ACTIVE mask

17 NOT Gate – Step 3 Form Gate Poly Grow thin Gate Oxide (長閘極氧化層 )
POLY mask Form Gate Poly Grow thin Gate Oxide (長閘極氧化層 ) Deposit Polysilicon (沈積多晶矽) Deposit Photoresist (沈積光阻) polysilicon gate oxide POLY mask

18 NOT Gate – Step 3 Form Gate Poly Grow thin Gate Oxide (長閘極氧化層 )
POLY mask Form Gate Poly Grow thin Gate Oxide (長閘極氧化層 ) Pattern Photoresist POLY MASK (使用POLY 光罩曝 光產生閘極) Etch Poly in exposed areas (移除多晶矽層) gate oxide POLY mask

19 NOT Gate – Step 3 Form Gate Poly Etch Poly in exposed areas (移除多晶矽層)
Etch Oxide (移除氧化層) gate oxide

20 NOT Gate – Step 4 Form pmos S/D Deposit photoresist (沈積光阻)
PSELECT mask Form pmos S/D Deposit photoresist (沈積光阻) Pattern photoresist PSELECT MASK (使用PSELECT光罩 曝光產生PMOS的 源極與汲極) PSELECT mask

21 NOT Gate – Step 4 Form pmos S/D Pattern photoresist
PSELECT mask Form pmos S/D Pattern photoresist PSELECT MASK (使用PSELECT光罩 曝光產生PMOS的 源極與汲極) Remove photoresist (移除光阻) POLY mask

22 NOT Gate – Step 4 Form pmos S/D Implant p-type dopants (植入P型元素)
Remove photoresist (移除光阻) p+ dopant p+ dopant POLY mask

23 NOT Gate – Step 5 Form nmos S/D Deposit photoresist (沈積光阻)
NSELECT mask Form nmos S/D Deposit photoresist (沈積光阻) Pattern photoresist NSELECT MASK (使用NSELECT光罩 曝光產生NMOS的 源極與汲極) p+ p+ p+ n POLY mask

24 NOT Gate – Step 5 Form nmos S/D Pattern photoresist
NSELECT mask Form nmos S/D Pattern photoresist NSELECT MASK (使用NSELECT光罩 曝光產生NMOS的 源極與汲極) Remove photoresist (移除光阻) p+ p+ p+ n POLY mask

25 NOT Gate – Step 5 Form nmos S/D Implant n-type dopants (植入N型元素)
Remove photoresist (移除光阻) n+ n+ n+ p+ p+ p+ n n+ dopant n+ dopant POLY mask

26 NOT Gate – Step 6 Form Contacts Deposit oxide (沈積氧化層)
CONTACT mask Form Contacts Deposit oxide (沈積氧化層) Deposit photoresist (沈積光阻) n+ n+ n+ p+ p+ p+ n CONTACT mask

27 NOT Gate – Step 6 Form Contacts Pattern photoresist
CONTACT mask Form Contacts Pattern photoresist CONTACT Mask (使用CONTACT光罩 曝光產生active層與 poly層之連接點) n+ n+ n+ p+ p+ p+ n CONTACT mask

28 NOT Gate – Step 6 Form Contacts Pattern photoresist
CONTACT Mask (使用CONTACT光罩 曝光產生active層與 poly層之連接點) Etch oxide (移除氧化層) n+ n+ n+ p+ p+ p+ n

29 NOT Gate – Step 6 Form Contacts Remove photoresist (移除光阻)
Deposit metal1 (沈積第一金屬層) Planerize (磨平第一金屬層) n+ n+ n+ p+ p+ p+ n

30 NOT Gate – Step 7 Form Metal 1 Traces Deposit photoresist (沈積光阻)
METAL1 mask Form Metal 1 Traces Deposit photoresist (沈積光阻) Pattern photoresist METAL 1 Mask (使用METAL 1光罩 曝光產生連接線路) n+ n+ n+ p+ p+ p+ n METAL1 mask

31 NOT Gate – Step 7 Form Metal 1 Traces Pattern photoresist
METAL 1 Mask (使用METAL 1光罩 曝光產生連接線路) Etch metal (移除第一金屬層) n+ n+ n+ p+ p+ p+ n metal over poly outside of cross section

32 NOT Gate – Step 7 Form Metal 1 Traces Pattern photoresist
METAL 1 Mask (使用METAL 1光罩 曝光產生連接線路) Etch metal (移除第一金屬層) Remove photoresist (移除光阻) n+ n+ n+ p+ p+ p+ n

33 NOT Gate – Step 8 Form Vias to Metal 1 Deposit oxide (沈積氧化層)
VIA mask Form Vias to Metal 1 Deposit oxide (沈積氧化層) Planerize oxide (磨平氧化層) Deposit photoresist (沈積光阻) n+ n+ n+ p+ p+ p+ n VIA mask

34 NOT Gate – Step 8 Form Vias to Metal 1 Deposit photoresist (沈積光阻)
VIA mask Form Vias to Metal 1 Deposit photoresist (沈積光阻) Pattern photoresist VIA Mask (使用VIA光罩曝光產 生連接金屬層之貫 孔) n+ n+ n+ p+ p+ p+ n VIA mask

35 NOT Gate – Step 8 Form Vias to Metal 1 Pattern photoresist
VIA Mask (使用VIA光罩曝光產 生連接金屬層之貫 孔) Etch oxide (移除氧化層) Remove photoresist (移除光阻) n+ n+ n+ p+ p+ p+ n

36 NOT Gate – Step 8 Form Vias to Metal 1 Deposit Metal 2 (沈積第二金屬層) n+ n+

37 NOT Gate – Step 9 Form Metal 2 Traces Deposit photoresist (沈積光阻)
METAL2 mask Form Metal 2 Traces Deposit photoresist (沈積光阻) Pattern photoresist METAL 2 Mask (使用METAL 2光罩 曝光產生連接線路) n+ n+ n+ p+ p+ p+ n

38 NOT Gate – Step 9 Form Metal 2 Traces Pattern photoresist
METAL 2 Mask (使用METAL 2光罩 曝光產生連接線路) Etch metal (移除第二金屬層) n+ n+ n+ p+ p+ p+ n

39 NOT Gate – Step 9 Form Metal 2 Traces Pattern photoresist
METAL 2 Mask (使用METAL 2光罩 曝光產生連接線路) Etch metal (移除第二金屬層) Remove photoresist (移除光阻) n+ n+ n+ p+ p+ p+ n

40 NOT Gate – Step 10+ Form Additional Traces Deposit oxide
Deposit photoresist Pattern photoresist Etch oxide Deposit metal Deposit photresist Etch metal Repeat for each additional metal n+ n+ n+ p+ p+ p+ n p-type substrate