加速度計 指導老師 : 洪正瑞 製作人 : 蔡昌佑

目錄 加速度計簡介 加速度設定方式 SPI連線方式 加速度計接腳圖 暫存器位置表(一)(二)(三)(四) 規格表 加速度計示意圖 裝置方塊圖 加速度計接腳說明(一)(二) 加速度計接腳圖 暫存器位置表(一)(二)(三)(四) 加速度設定方式 SPI連線方式 SPI時序圖

規格表 2.16 V to 3.6 V supply voltage 1.8 V compatible IOs <1 mW power consumption ± 2g/± 8g dynamically selectable full-scale I2C/SPI digital output interface Programmable multiple interrupt generator Click and double click recognition Embedded high pass filter Embedded self test 10000g high shock survivability ECOPACK® RoHS and “Green” compliant

加速度計示意圖 變電容的兩塊電極，一塊為固定電極，另一塊為可動電極，可動電極上附著一個質量塊，當受到外力產生加速度作用時，質量塊因慣性作用而產生位移，因此改變了固定電極與可動電極間的距離；電極板間距改變，電容值也會跟著改變，再經由電容值量測電路與放大電路，得知加速度值。

裝置方塊圖

加速度計接腳說明(一) Pin# Name Function 1 Vdd_IO 2,4,5,10 GND 3 Reserved 6 Vdd Power supply for I/O pins 2,4,5,10 GND 0V supply 3 Reserved Connect to Vdd 6 Vdd Power supply 7 CS SPI enable I2C/SPI mode selection (1: I2C mode; 0: SPI enabled) 8 INT 1 Inertial interrupt 1 9 INT 2 Inertial interrupt 2

加速度計接腳說明(二) Pin# Name Function 11 Reserved 12 SDO 13 SDA SDI 14 SCL Connect to Gnd 12 SDO SPI Serial Data Output I2C less significant bit of the device address 13 SDA SDI I2C Serial Data (SDA) SPI Serial Data Input (SDI) 3-wire Interface Serial Data Output (SDO) 14 SCL SPC I2C Serial Clock (SCL) SPI Serial Port Clock (SPC)

SPI時序圖

加速度計接腳圖

暫存器位置表(一) Name Name Type Register address Default Comment Hex Binary Reserved 00-0E Who_Am_I r 0F 000 1111 00111011 Dummy egister 10-1F Ctrl_Reg1 rw 20 010 0000 00000111 Ctrl_Reg2 21 010 0001 00000000 Ctrl_Reg3 22 010 0010 HP_filter_reset 23 010 0011 dummy 24-26 Status_Reg 27 010 0111

暫存器位置表(二) Name Name Type Register address Default Comment Hex Binary OutX r 29 010 1001 output OutY 2B 010 1011 OutZ 2D 010 1101 Reserved 2E-2F FF_WU_CFG_1 rw 30 011 0000 00000000 FF_WU_SRC_1 (ack1) 31 011 0001 FF_WU_THS_1 32 011 0010 0000000x FF_WU_DURATION_1 33 011 0011

暫存器位置表(三) Name Name Type Register address Default Comment Hex Binary Reserved 00-0E Who_Am_I r 0F FF_WU_CFG_2 rw 34 011 0100 00000000 FF_WU_SRC_2 (ack2) 35 011 0101 FF_WU_THS_2 36 011 0110 FF_WU_DURATION_2 37 011 0111 CLICK_CFG 38 011 1000 CLICK_SRC (ack) 39 011 1001

暫存器位置表(四) Name Name Type Register address Default Comment Hex Binary CLICK_THSY_X rw 3B 011 1011 00000000 CLICK_THSZ 3C 011 1100 CLICK_TimeLimit 3D 011 1101 CLICK_Latency 3E 011 1110 CLICK_Window 3F 011 1111

WHO_AM_I 1 當你開始使用LIS302DL時送入起始訊息時， LIS302DL會傳回的歡迎碼。 1 Device identification register. This register contains the device identifier that for LIS302DL is set to 3Bh.

CTRL_REG1 DR PD FS STP STM Zen Yen Xen DR PD FS Zen Yen Xen STP, STM Data rate selection. Default value: 0 (0: 100 Hz output data rate; 1: 400 Hz output data rate) PD Power Down Control. Default value: 0 (0: power down mode; 1: active mode) FS Full Scale selection. Default value: 0 (refer to Table 3 for typical full scale value) STP, STM Self Test Enable. Default value: 0 (0: normal mode; 1: self test P, M enabled) Zen Z axis enable. Default value: 1 (0: Z axis disabled; 1: Z axis enabled) Yen Y axis enable. Default value: 1 (0: Y axis disabled; 1: Y axis enabled) Xen X axis enable. Default value: 1 (0: X axis disabled; 1: X axis enabled)

CTRL_REG2 SIM BOOT -- FDS HP_coeff2 HP_coeff1 SIM U2 HP_FF_W U2 U1 HP_coeff2 HP_coeff1 SIM SPI Serial Interface Mode selection. Default value: 0 (0: 4-wire interface; 1: 3-wire interface) BOOT Reboot memory content. Default value: 0 (0: normal mode; 1: reboot memory content) FDS Filtered Data Selection. Default value: 0 (0: internal filter bypassed; 1: data from internal filter sent to output register) HP_FF_W U2 High Pass filter enabled for FreeFall/WakeUp # 2. Default value: 0 (0: filter bypassed; 1: filter enabled) U1 High Pass filter enabled for Free-Fall/Wake-Up #1. Default value: 0 HP_coeff2 HP_coeff1 High pass filter cut-off frequency configuration. Default value: 00 (See table below)