義守大學電機工程學系 陳慶瀚 pierre@mail.isu.edu.tw 第4章 VHDL Sequential語法 義守大學電機工程學系 陳慶瀚 pierre@mail.isu.edu.tw
1. 流程控制(Flow Control)
1.1 Process Statements
1.2 Process 語法 Example: [ process_label:] PROCESS( sensitivity_list ) { process_declaration } BEGIN { sequential_statements } END PROCESS [ process_label ]; comb:PROCESS(a, b, c) VARIABLE temp:STD_LOGIC; BEGIN temp:=NOT(a AND b); IF(c = ‘1’) THEN y <= ‘0’; ENDIF; END PROCESS comb; Example:
1.3 Process 語法說明 語法說明 process_label:流程的名稱標記,可有可無。 sensitivity_list:使程式進入流程的觸發信號。一旦觸發信號改變時,即執行一次這個流程,否則流程不會被執行。 process_declaration:宣告流程內部使用的信號或變數。 sequential_statement;順序式的陳述。
1.4 Sequential Statement IF-THEN-ELSE CASE LOOP ASSERT WAIT
1.5 IF-THEN-ELSE Example 2-1 Mux PROCESS(sel, i0,i1) BEGIN IF condition THEN sequential_statements { ELSIF condition THEN sequential_conditions } [ ELSE sequential_statements ] END IF; PROCESS(sel, i0,i1) BEGIN IF(sel=’0’) THEN y <= i0; ELSE y <= i1; END IF; END PROCESS; Example 2-1 Mux
1.6 IF-THEN-ELSE範例 Example 1 Example 2 PROCESS(a, b) BEGIN IF(a = ‘0’)THEN y <= ‘0’; ELSE y <= ‘b’; END IF; END PROCESS; Example 1 PROCESS(i0, i1, a, b) BEGIN IF(a = ‘0’ AND b = ‘1’)THEN y <= i0; ELSE IF (a=’1’ AND b=’0’)THEN y <=i1; END IF; END PROCESSS; Example 2
1.7 Case-When 範例: 語法: CASE expression IS WHEN choice { sequential_statements } {sequential_statements} WHEN OTHERS END CASE; CASE sel IS WHEN “00” Z <= I0; WHEN “01” Z <= I1; WHEN “10” Z <= I2; WHEN “11” Z <= I3; WHEN OTHERS Z <= ‘X’; END CASE;
2. 迴圈(Loop)
2.1、 LOOP Iteration_scheme : WHILE LOOP FOR LOOP WHEN (condition) LOOP FOR i IN range LOOP 語法: [loop_label:] [iteration_scheme] LOOP sequential_statements END LOOP [loop_label]; Type : WHILE LOOP FOR LOOP
2.2 Loop Example Example 1: Example 2: FOR i IN 10 DOWNTO 1 LOOP i_squared(i):= i * i; END LOOP; Example 2: WHILE ( day = weekday ) LOOP day := get_next_day(day); END LOOP;
2.3 NEXT and EXIT NEXT 相當於 C 語言中的 continue, 跳至迴圈下一個cycle繼續執行 FOR i IN 0 TO 255 LOOP IF (done (i) = TRUE) THEN NEXT; ELSE done (i):= TRUE; END IF; q <= a(i) AND b(i); END LOOP;
2.4 NEXT and EXIT EXIT 相當於 C 語言中的 break,作用在於中斷迴圈 PROCESS (a,b) BEGIN first_loop:FOR i IN 0 TO 100 LOOP second_loop:FOR j IN 1 TO 10 LOOP ......... EXIT second_loop;--exit the second loop only ........... EXIT first_loop;--exit the first loop only END LOOP; y<=a; y<=b; END PROCESS
3. Wait
3.1 Wait語法 WAIT ON signals changes WAIT UNTIL an expression is true 功能: 等待(1)信號改變(2)條件判斷為真(3)一段時間 目的: 描述暫存器 (latch,flip-flop) WAIT ON signals changes WAIT UNTIL an expression is true WAIT FOR a specific amount of time
3.2 Wait Example Example 1: Positive edge-trigger D flip-flop PROCCESS BEGIN WAIT UNTIL clock =‘1’ AND clock’EVENT q <= d; END PROCCESS Example 2 : Asynchronous reset D flip-flop PROCCESS BEGIN IF (reset = ‘1’) THEN q <= 0; ELSE IF clock’EVENT AND clock=‘1’ THEN q <= d; END IF; WAIT ON reset, clock; END PROCCESS
3.3 Wait Example Example 3 : Synchronous reset D flip-flop PROCCESS BEGIN WAIT UNTIL clock=‘1’ AND clock’EVENT IF (reset = ‘1’) THEN q <= 0; ELSE q <= d; END IF; END PROCCESS
3.4 Multiple WAIT conditions WAIT ON nmi,interrupt UNTIL ((nmi = TRUE) or (interrupt = TRUE)) FOR 5 usec; 等待 nmi 或 interrupt 的信號變化, 且其中之一的值為 TRUE 或者過 5 usec 再後繼續執行
3.5 Multiple WAIT conditions WAIT ON nmi,interrupt UNTIL ((nmi = TRUE) or (interrupt = TRUE)) FOR 5 usec; 等待 nmi 或 interrupt 的信號變化, 且其中之一的值為 TRUE 或者過 5 usec 再後繼續執行
3.6 Sensitivity list V.S. WAIT 當PROCESS中含有WAIT等待的陳述時, 就不能再有sensitivity list觸發信號,否則 會造成互相等待的情形。
: Exercise